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  as1716 capacitive sensor interface datasheet www.austriamicrosystems.com revision 1.00 1 - 12 1 general description as1716 is an analog front end specifically designed for unbiased capacitive sensors, as for instance knock sensors in automotive, to be interfaced with analog dig- ital converters with sample and hold input stages. the device provides differential inputs, a 1st order low pass filter to cutoff the high frequency noise compo- nents, differential to single ended conversion, program- mable gain stage and a 2 pole low pass multiple feedback filter. the knock sensor is a piezo electric device that gener- ates a voltage if it is stressed. it senses knock and trans- mits information to the electronic engine management control unit. this influences process control in the engine, for example timing and fuel injection until knock is eliminated. the capacitive sensor is bias ed via resistors to a voltage level of v dda /2. figure 1. as1716 block diagram 2 key features differential input stage with wide input range resistive sensor biasing (v dda /2) programmable gain (x0.5, x1, x2, x4) internal 2 nd order low pass multiple feedback filter with a min. cut off frequency of 16khz single supply operation: 4.5v to 5.5v operating temperature range: -40c to +125c high cmrr: 55db (min) emc characterized by iec 61967-4 (1 / 150 method) emc characterized by iec 62132-4 (direct power injection) automotive qualified to aecq100 for ic and ppap level 3 8-pin soic package 3 applications analog front end for capacitive sensors to analog to digital converters and dsp. + - - + - + vdda vdda/2 multiple feedback lp filter fc ~23khz typ. inp ga gb out nc vssa vdda gain control x0.5, x1, x2, x4 - + vdda/2 vdda/2 vdda/2 - + vdda/2 inn as1716
www.austriamicrosystems.com revision 1.00 2 - 12 as1716 datasheet - pinout 4 pinout pin assignment figure 2. pin assignments (top view) pin description table 1. pin description pin name pin number description vdda 1 positive supply. ga 2 gain selection. internal pull-down of 100k gb 3 gain selection. internal pull-down of 100k inp 4 non-inverting input. inn 5 inverting input. nc 6 not connected. must be left unconnected in the application vssa 7 negative supply. out 8 signal output. out vssa nc inn vdda ga gb inp as1716 1 2 3 4 8 7 6 5
www.austriamicrosystems.com revision 1.00 3 - 12 as1716 datasheet - absolute maximum ratings 5 absolute maximum ratings stresses beyond those listed in table 2 may cause permanent damage to the device. these are stress ratings only, and functional operation of the de vice at these or any other cond itions beyond those indicated in electrical character- istics on page 4 is not implied. exposure to absolute maximum ra ting conditions for extended periods may affect device reliability. table 2. absolute maximum ratings parameter min max units comments vdda, vssa + 7.0 v ga, gb, out, inp, inn, nc vssa - 0.3 vdda + 0.3 v to get an overvoltage protection of up to +16v at the system level, apply external resistors (typ. 1k ) on the pins inp and inn . esd 4 kv aec-q100-002, @ t a = +25oc latchup immunity -100 +100 ma aec-q100-004, @ t a = +25oc operating temperature range -40 +125 oc junction temperature +150 oc storage temperature range -65 +150 oc package body temperature +260 oc the reflow peak soldering temperature (body temperature) specified is in accordance with ipc/jedec j-std- 020d ?moisture/reflow sensitivity classification for non-hermetic solid state surface mount devices?. the lead finish for pb-free leaded packages is matte tin (100% sn).
www.austriamicrosystems.com revision 1.00 4 - 12 as1716 datasheet - electrical characteristics 6 electrical characteristics t a = -40oc to +125oc, para meters are measured at v dda = 4.5v to 5.5v, r load = 100 serial to c load = 10nf, t a = +25oc and are refering to vssa, unless othe rwise specified. typical values are li sted for reference only and will not be tested. table 3. electrical characteristics symbol parameter condition min typ max unit dc electrical characteristics v dda supply voltage range @ pin vdda 4.5 5 5.5 v i dda supply current @ pin vdda 3 4.5 9 ma psrr 1 power supply rejection ratio 6db v cm common mode input range @ pins inn, inp v ssa v dda v cmrr common mode rejection ratio 55 db r in differential input resistance between pins inn and inp 70 100 130 k v ref internal common mode input voltage inp shorted to inn v dda /2 -2% v dda /2 v dda /2 +2% v v off offset voltage gain1, v inp = v inn @ v cm = v dda /2, @ pin out v ref -10 v ref +10 mv v il logic low (ga, gb) @ pin ga and gb 1.2 v v ih logic high (ga, gb) @ pin ga and gb 2.0 v i leak leakage current (ga, gb) v dda = 5v, gain4 1 a v hyst 1 hysteresis @ pin ga and gb 100 200 mv r pd pull-down resistor @ pin ga and gb 50 100 150 k gain0.5 overall gain 0.5 ga = gb = 1 0.5-10% 0.5 0.5+10% gain1 overall gain 1 ga = 1, gb = 0 1-10% 1 1+10% gain2 overall gain 2 ga = 0, gb = 1 2-5% 2 2+5% gain4 overall gain 4 ga = gb = 0, default setting 4-5% 4 4+5% r l external serial resistor r l serial to c l (see figure 13 on page 9) 100 1k c l external capacitive load 0.01 10 nf i short+ positive short circuit current v out is driven to v dda and v out is connected to v ssa 25 ma i short- negative short circuit current v out is driven to v ssa and v out is connected to v dda 25 ma v out-l output range low @ pin vout v ssa + 0.05 v v out-h output range high @ pin vout v dda - 0.05 v
www.austriamicrosystems.com revision 1.00 5 - 12 as1716 datasheet - electrical characteristics ac electrical characteristics f c filter cut-off frequency v dda = 4.5v, ga = gb = 0, inp-inn = 1v pp, f in = 16khz and 29khz 16 23 29 khz thd total harmonic distortion v dda = 5v, f in = 1khz, inp-inn = 8v pp , gain0.5 80 db v noise rms noise at out gain4, f c = 50hz - 23khz 1 mv rms 1. guaranteed by design table 3. electrical characteristics (continued) symbol parameter condition min typ max unit
www.austriamicrosystems.com revision 1.00 6 - 12 as1716 datasheet - typical operating characteristics 7 typical operating characteristics v dda = 5.0v, t a = +25oc (unless otherwise specified). figure 3. cmrr vs. temperature; ga = gb = 0 figure 4. supply current vs. temperature; -80 -75 -70 -65 -60 -40 -20 0 20 40 60 80 100 120 temperature (c) cmrr (db) 0 1 2 3 4 5 6 7 8 9 10 -40 -20 0 20 40 60 80 100 120 temperature (c) supply current (ma) figure 5. thd vs. temperature figure 6. thd vs. frequency -85 -84 -83 -82 -81 -80 -79 -78 -77 -76 -75 -40 -20 0 20 40 60 80 100 120 temperature (c) thd (db) -140 -120 -100 -80 -60 -40 -20 0 20 10 100 1000 10000 100000 frequency (hz) thd (dbv) figure 7. transfer characteristics figure 8. phase gain -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 1 10 100 1000 10000 frequency (khz) transfer characteristic (db) mi n typ max -400 -300 -200 -100 0 100 1 10 100 1000 10000 frequency (khz) phase gain (deg) mi n typ max
www.austriamicrosystems.com revision 1.00 7 - 12 as1716 datasheet - detailed description 8 detailed description sensor biasing and input protection resistors due to the capacitive and differential nature of the knock se nsor, the common mode voltage for the sensor must be set. this is ensured by the first amplifier, whose vi rtual ground is biasing the sensor via a of 50k resistor. due to a failure, voltages up to 16v can occur on the input pins. in this case two external serial resistors of 1k must be applied at the inputs. these resi stors are limiting the current, when th e on chip protection diode opens. figure 9. sensor biasing inverting input structure the input strucutre is a first order low-pass filter and fulfills two main functions. fi rst, it is used for biasing the sensor and second, the first order low-pass filter characteristic is used for noise suppression. figure 10. input buffer due to failure up to 16v 560k 1200pf typical sensor 100pf 1k 100pf 1k inn inp + - vdda vdda/2 - + vdda/2 - + vdda/2 - + vdda/2
www.austriamicrosystems.com revision 1.00 8 - 12 as1716 datasheet - detailed description fully differential to single ended conversion the subtractor block converts the filter ed differential sensor signal into a single ended signal. further this block pro- vides also the gain setting (see section gain settings) . figure 11. subtractor block gain settings by means of pins ga and gb, 4 gain settings (x0.5, x1, x2, x4) can be realized. the default gain setting is 4, ga=0 and gb=0. multiple feedback filter the multiple feedback filter provides a second order lo w pass characteristics with a minimum cut-off frequency of 16khz and a typical f c of 23khz. the multiple feedback configuration is used to avoid aliasing, to filter out high fre- quency components. the output is able to drive a resistor from 100 to 1k serial to a 10nf capacitor. figure 12. multiple feedback filter table 4. gain settings gain ga gb 0.5 1 1 110 201 400 - + gain control x0.5, x1, x2, x4 - + out multiple feedback lp filter fc ~23khz typ. vdda/2
www.austriamicrosystems.com revision 1.00 9 - 12 as1716 datasheet - application information 9 application information figure 13. application diagram, minimal requirements values of the suggested external components are indicative and need to be characterized for each specific application. typical piezo sensor: resistor from 500k to 1m capacity from 900nf to 1.5f typical wire equivalent circuit: capacity to groung from 100pf to 400pf / meter capacity between wires strongly depends on type of wires (twisted-pair strongly suggested) resistance is typical 50m / meter @ 20c layout rules input resistors and capacitors at the inputs should be pl aced as close as possible to the stonger possible source of disturbances (i.e. the input connector). the input lines should be kept as short as possible and routed close to each other. the filter capacitor (100nf) on supply should be a ceramic type and placed as close as possible to the chip. vssa and vdda lines on pcb should have larger width than other signals to minimize resistance, especially if the 10f capacitor is not very close to the chip. the output line should be kept as short as possible. due to failure up to 16v 560k 1200pf typical sensor 100pf 1k 100pf 1k - + multiple feedback lp filter fc ~23khz typ. gain control x0.5, x1, x2, x4 inn inp ga gb 100 to 1k out 10nf c 12 bit ad 50k s/s nc vssa vdda 100nf 10f v 4.5...5.5v - + - + vdda/2 - + vdda/2 + - vdda vdda/2 vdda/2 vdda/2 as1716
www.austriamicrosystems.co m revision 1.00 10 - 12 as1716 datasheet - package drawings and markings 10 package drawings and markings the device is available in a 8-pin soic package. figure 14. 8-pin soic package dimensions symbol min max a1.521.72 a1 0.10 0.25 a2 1.37 1.57 b0.360.46 c0.190.25 d4.804.98 e3.813.99 e1.27bsc h5.806.20 h0.250.50 l0.411.27 0o 8o zd 0.53ref notes: 1. lead coplanarity should be 0 to 0.10mm (.004?) max. 2. package surface finishing: - top, matte (charmilles #18-30) - all sides, matte (charmilles +18-30) - bottom, smooth or matte (charmilles +18-30) 3. all dimensions excluding mold flashes and end flash from the pack- age body shall not exceed 0.25mm (.010?) per side. 4. details of pin #1 mark are opt ional but must be located within the area indicated.
www.austriamicrosystems.co m revision 1.00 11 - 12 as1716 datasheet - ordering information 11 ordering information the device is available as the standard product shown in table 5 . all devices are rohs compliant and free of halogene substances. table 5. ordering information ordering code marking description delivery form package AS1716A-ASOT as1716a capacitive sensor interface, 16khz tape and reel 8-pin soic
www.austriamicrosystems.co m revision 1.00 12 - 12 as1716 datasheet copyrights copyright ? 1997-200 9, austriamicrosystems ag, schloss premstaett en, 8141 unterpremstae tten, austria-europe. trademarks registered ?. all rights reserved. the materi al herein may not be reprodu ced, adapted, merged, trans- lated, stored, or used witho ut the prior written consent of the copyright owner. all products and companies mentioned are trademarks or registered trademarks of their respective companies. disclaimer devices sold by austriamicrosystems ag are covered by t he warranty and patent indemni fication provisions appearing in its term of sale. austriamicrosystems ag makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austria- microsystems ag reserves the right to change specifications and prices at any time and without notice. therefore, prior to designing this product into a syst em, it is necessary to check with aust riamicrosystems ag for current informa- tion. this product is intended for use in normal commercial applications. applications requiring extend ed temperature range, unusual environmental requirements, or high reliability app lications, such as military, medical life-support or life- sustaining equipment are specifically not recommended wit hout additional processing by austriamicrosystems ag for each application. for shipments of less than 100 parts the m anufacturing flow might show deviations from the standard production flow, such as test flow or test location. the information furnished here by austriamicrosystems ag is believed to be correct and accurate. however, austriamicrosystems ag shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or ar ising out of the furnishing, performance or use of the tech- nical data herein. no obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems ag rendering of technical or other services. contact information headquarters austriamicrosystems ag tobelbaderstrasse 30 a-8141 unterpremstaetten - graz, austria tel: +43 (0) 3136 500 0 fax: +43 (0) 3136 525 01 for sales offices, distributors a nd representatives, please visit: http://www.austriamicr osystems.com/contact-us


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